• Sr. ASIC Design Verification

    SpaceX (Sunnyvale, CA)
    Sr. ASIC Design Verification Engineer...of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at ... possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (05/10/24)
    - Save Job - Related Jobs - Block Source
  • ASIC and/or FPGA Design

    The Boeing Company (Mountain View, CA)
    …& Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** at Lead, Senior & Principal ... across the company and around the world and support ASIC / FPGA design and verification...HDL coding, and physical design realization (through gate -level netlists for ASIC designs) + Integrate… more
    The Boeing Company (05/18/24)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Design

    Tarana Wireless (Milpitas, CA)
    …demands of next generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification requirements and coverage ... Tarana Wireless is seeking to hire verification engineers to verify the world's most powerful...the best DSP, system, and software engineers to define verification strategies and execute plans at system or full… more
    Tarana Wireless (04/14/24)
    - Save Job - Related Jobs - Block Source
  • Systems Design Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …team's workflows. Skills + Must have at least 4 years of experience in managing ASIC design , integration, or verification teams. + Must have expertise in ... verification . + Experience in using UVM for functional verification of ASIC designs. + Experience with...Cadence and Synopsys for design simulation and verification . + Extensive experience with FPGA emulation,… more
    Cadence Design Systems, Inc. (04/25/24)
    - Save Job - Related Jobs - Block Source
  • Senior FPGA Prototyping Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). ... + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it...and testing infrastructure and verify the correctness of the design . + Good coordination with architects, designers, verification more
    NVIDIA (05/01/24)
    - Save Job - Related Jobs - Block Source
  • Machine Learning SoC Engineer, Architecture…

    Google (Sunnyvale, CA)
    …experience bringing up hardware functionality through Simulations/FPGAs/Emulation. + Experience working on ASIC / FPGA design or verification . Preferred ... and validate complex hardware/software (HW/SW) designs in pre-silicon. + Architect and Design ASIC models for Emulation/ FPGA Prototypes. Design SoC… more
    Google (05/21/24)
    - Save Job - Related Jobs - Block Source
  • Senior Principal ASIC Design

    BAE Systems (San Jose, CA)
    …and remotely. \#IJS **Required Education, Experience, & Skills** + Proficient in Verilog language for ASIC / FPGA design + Knowledge of ASIC and FPGA ... and verification methodologies (VCS simulator, UVM) + Proficient in ASIC / FPGA timing closure/area optimization techniques + Hands on Experience with… more
    BAE Systems (05/31/24)
    - Save Job - Related Jobs - Block Source
  • Sr. ASIC Design Engineer, DDR IP…

    SpaceX (Sunnyvale, CA)
    …as necessary to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC / FPGA Design Engineer/Senior: $170,000.00 - $230,000.00/per year Your ... Sr. ASIC Design Engineer, DDR IP (Silicon...design flow + Experience in RTL development and verification using Verilog and/or SystemVerilog PREFERRED SKILLS AND EXPERIENCE:… more
    SpaceX (03/29/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Design Manager

    Amazon (Cupertino, CA)
    …Autodesk, Amazon Alexa, Amazon Rekognition and more customers in various other segments. As an ASIC design manager, you will lead design team deliver some of ... and delivering team's results. - Work closely with software, verification and physical design teams to deliver...or equivalent experience * 7+ years of experience in ASIC design and implementation with full end… more
    Amazon (03/27/24)
    - Save Job - Related Jobs - Block Source
  • Technical Program Manager, ASIC

    Meta (Menlo Park, CA)
    **Summary:** Meta is seeking a Technical Program Manager with ASIC / FPGA design and development experience. This Technical Program Manager (TPM) will lead ... details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification , physical… more
    Meta (04/16/24)
    - Save Job - Related Jobs - Block Source
  • SoC Modeling ASIC Engineer

    Meta (Sunnyvale, CA)
    …pre-silicon models 5. Collaborate with cross functional teams working on RTL design , Design Verification , Firmware/Software development, to deliver first ... silicon 9. In-depth understanding of system-on-chip (SoC) architecture, SoC memory hierarchy, and ASIC design flow 10. Proficient programming skills in C++ and… more
    Meta (03/22/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Physical Design Engineer…

    Amazon (Cupertino, CA)
    …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...use for accelerated computing: either Machine Learning acceleration, or FPGA acceleration. We get our hands dirty, from creating… more
    Amazon (03/28/24)
    - Save Job - Related Jobs - Block Source
  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …at the entire stack, through algorithms to architecture, transistors to firmware. As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art graphics IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with...systems like Mercurial(Hg), Git. 18. Experience with low power design . 19. FPGA implementation and debug experience.… more
    Meta (03/22/24)
    - Save Job - Related Jobs - Block Source
  • Senior Design Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Design Verification Engineer! What you'll be doing: + Technical leadership role to define/plan/implement/execute verification ... + Ability to delve into lowest level details of ASIC design specification, implementation and it's system.../ VC Formal) is a plus. + Experience with gate -level simulation, reset verification , contention checking is… more
    NVIDIA (05/25/24)
    - Save Job - Related Jobs - Block Source
  • Design Verification Engineer

    Verilab (San Jose, CA)
    … experts. Founded in 2000, we specialize in solving the toughest functional verification problems for ASIC , FPGA and independent IP development. ... of consultants, providing clients with the very best in verification . You will be exposed to a diverse range...Verilab, you will be responsible for all aspects of verification planning, management and implementation. You will be directly… more
    Verilab (04/19/24)
    - Save Job - Related Jobs - Block Source
  • Senior Applications Engineer Digital…

    Siemens Digital Industries Software (Fremont, CA)
    …candidates who like to strategize, interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of ... technical validity of the solutions to achieve the customer's design and verification objectives * Keeps other...skills * Deep knowledge of semiconductor IC industry - ASIC , FPGA , SoC, Memory, Interconnect, CPU architectures,… more
    Siemens Digital Industries Software (05/09/24)
    - Save Job - Related Jobs - Block Source
  • Senior Verification Architect, SOC

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking to hire a senior verification architect to design verification methodology for our next generation SOCs with AI capabilities for ... new verification processes and criteria for end-to-end verification . + Work with architects, RTL designers, FPGA...and autonomous engineer with a real passion for improving design verification efficiency and pushing barriers? If… more
    NVIDIA (04/16/24)
    - Save Job - Related Jobs - Block Source
  • SOC Design Engineer

    Google (Sunnyvale, CA)
    …reset checks and low power design . + Experience with silicon, emulation, FPGA validation and debug, functional verification , physical design , and DFT ... equivalent practical experience. + 2 years of experience in ASIC design flows and methodologies, with 1...will own deliverables to the cross-functional teams (eg, Physical Design , Verification , Validation, etc.) at various project… more
    Google (04/24/24)
    - Save Job - Related Jobs - Block Source
  • Senior Applications Engineer, DDR Design IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …Experience on memory subsystem verification and/or performance analysis . Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... make an impact on the world of technology. Title Senior Applications Engineer - DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops… more
    Cadence Design Systems, Inc. (04/03/24)
    - Save Job - Related Jobs - Block Source
  • Lead C++ Software Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …thesis in a relevant area. + Ideally you are a solid contributor in the FPGA or ASIC prototyping/synthesis/ verification space and have delivered great QoR on ... of super star engineers to develop our next generation FPGA based verification platform. Responsibilities: + Implement...flow for the platform with other engineers. + Write Design Specifications and Unit Tests for your code Position… more
    Cadence Design Systems, Inc. (05/31/24)
    - Save Job - Related Jobs - Block Source